Example embodiments of the inventive concepts relate to a semiconductor memory device having a hierarchical bit line structure and a method of driving the semiconductor memory device, and more particularly, to a semiconductor memory device having a hierarchical bit line structure using a folded bit line structure.
In order to increase the integration density of a semiconductor memory device, conventional semiconductor memory devices, may use a hierarchical bit line structure. Conventional semiconductor memory devices having a hierarchical bit line structure, may use an open bit line structure. In the conventional semiconductor memory device having the hierarchical bit line structure using the open bit line method, adjacent memory cells connected to the same word line may be simultaneously sensed by different bit lines and different sensing amplifiers, and coupling noise may occur between adjacent bit lines. In addition, since the conventional semiconductor memory device having the hierarchical bit line structure using the open bit line structure may need to include sensing amplifiers for every two pitches of a bit line, an area ratio of the sensing amplifiers with respect to the semiconductor memory device may not be small, and thus it may be difficult to obtain a semiconductor memory device with high integration density.